Espressif Systems /ESP32-C6 /SOC_ETM /CH_ENA_AD0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CH_ENA_AD0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH_ENA0)CH_ENA0 0 (CH_ENA1)CH_ENA1 0 (CH_ENA2)CH_ENA2 0 (CH_ENA3)CH_ENA3 0 (CH_ENA4)CH_ENA4 0 (CH_ENA5)CH_ENA5 0 (CH_ENA6)CH_ENA6 0 (CH_ENA7)CH_ENA7 0 (CH_ENA8)CH_ENA8 0 (CH_ENA9)CH_ENA9 0 (CH_ENA10)CH_ENA10 0 (CH_ENA11)CH_ENA11 0 (CH_ENA12)CH_ENA12 0 (CH_ENA13)CH_ENA13 0 (CH_ENA14)CH_ENA14 0 (CH_ENA15)CH_ENA15 0 (CH_ENA16)CH_ENA16 0 (CH_ENA17)CH_ENA17 0 (CH_ENA18)CH_ENA18 0 (CH_ENA19)CH_ENA19 0 (CH_ENA20)CH_ENA20 0 (CH_ENA21)CH_ENA21 0 (CH_ENA22)CH_ENA22 0 (CH_ENA23)CH_ENA23 0 (CH_ENA24)CH_ENA24 0 (CH_ENA25)CH_ENA25 0 (CH_ENA26)CH_ENA26 0 (CH_ENA27)CH_ENA27 0 (CH_ENA28)CH_ENA28 0 (CH_ENA29)CH_ENA29 0 (CH_ENA30)CH_ENA30 0 (CH_ENA31)CH_ENA31

Description

channel enable register

Fields

CH_ENA0

ch0 enable

CH_ENA1

ch1 enable

CH_ENA2

ch2 enable

CH_ENA3

ch3 enable

CH_ENA4

ch4 enable

CH_ENA5

ch5 enable

CH_ENA6

ch6 enable

CH_ENA7

ch7 enable

CH_ENA8

ch8 enable

CH_ENA9

ch9 enable

CH_ENA10

ch10 enable

CH_ENA11

ch11 enable

CH_ENA12

ch12 enable

CH_ENA13

ch13 enable

CH_ENA14

ch14 enable

CH_ENA15

ch15 enable

CH_ENA16

ch16 enable

CH_ENA17

ch17 enable

CH_ENA18

ch18 enable

CH_ENA19

ch19 enable

CH_ENA20

ch20 enable

CH_ENA21

ch21 enable

CH_ENA22

ch22 enable

CH_ENA23

ch23 enable

CH_ENA24

ch24 enable

CH_ENA25

ch25 enable

CH_ENA26

ch26 enable

CH_ENA27

ch27 enable

CH_ENA28

ch28 enable

CH_ENA29

ch29 enable

CH_ENA30

ch30 enable

CH_ENA31

ch31 enable

Links

() ()